Without limiting the scope of the invention, its background is described in connection with semiconductor devices, as an example.
Heretofore, in this field, bipolar transistors have employed a heavily doped subcollector layer to reduce series collector resistance. However, the heavily-doped layer can cause increased parasitic capacitance if it extends outside of the active device region. This problem is particularly acute for pnp Heterojunction Bipolar Transistors (HBTs) in AlGaAs/GaAs. Since hole mobility is much lower than electron mobility in GaAs, the pnp subcollector layer must be much more heavily doped to achieve the same sheet resistance as compared to npn HBTs. Solutions that have been used in the past to overcome this problem include: mesa isolation, in which the epitaxial layers of an HBT structure are etched away; ion bombardment to increase the resistivity of portions of the subcollector; and patterned ion implantation of the subcollector, in which the subcollector is formed by ion implantation only in the device active area.